One Gate, Four Layers
One gate, four layers
The same NAND seen at four levels: as algebra, as a logic gate, as a CMOS circuit, and as a relay contact. Each level keeps one thing and hides another.
| Layer | Primitives | What it buys you | What it hides |
|---|---|---|---|
| Boolean algebramathematics | ∧ ∨ ¬de Morgan, distributivity | Lets you prove that two circuits are equal without building either of them. | Cost, delay, and whether it can be built at all |
| Digital logicengineering | AND / OR / NOTtruth tables, clocks | Composes gates into adders, registers and processors, and gives a language for timing. | How a gate is actually made, or what it costs in silicon |
| CMOSphysics | NAND / NOR / INVtransistors, voltage | NAND is the primitive because a pull-down network inverts as it conducts — six transistors beat four. | Which arrangement of gates is worth building |
| Relay logic1937 | contacts, coilsShannon's thesis | Series is AND, parallel is OR, a normally-closed contact is NOT: the same algebra, thirty years earlier. | Speed, size, or anything that would make it a computer |
Same function, different price
A NAND is four transistors; an AND is six, because it is a NAND followed by an inverter. The algebra says they are equally expressive. The silicon says otherwise.
Why NAND and not AND
In CMOS the pull-down network already inverts the result, so the inverting gate is the one you get for free. That single fact is why NAND is the primitive in every standard cell library.
Why the course starts at gates
Starting from NAND means every later layer is a construction, not an assumption: you can point at the four transistors and then at Tetris.
Transistor count, 2-input static CMOS
| INV | 2 | one pull-up, one pull-down |
| NAND2 | 4 | two of each |
| NOR2 | 4 | wider, but the same count |
| AND2 | 6 | NAND2 + INV |
| OR2 | 6 | NOR2 + INV |
| XOR2 | 10–12 | four NANDs |
Counts are for a single stage. Real libraries trade area for drive strength, so the numbers move, but the ordering does not.
What changes between layers
Moving down a layer adds constraints and removes choices. Algebra has no notion of time; CMOS gates take nanoseconds; a relay takes milliseconds and wears out.
Moving up a layer does the opposite: it removes detail so that a bigger structure fits in your head. A CPU made of transistors is unreadable; a CPU made of adders and registers is a diagram.